1. Field of the Invention
The present invention relates to a magnetoresistive random access memory (MRAM) and a driving method thereof.
2. Background Art
A magnetoresistive random access memory (hereinafter also referred to as MRAM) is a memory device using magnetic elements having magnetoresistance effects in a memory cell. Magnetoresistive random access memories have been attracting attention as next generation memory devices characterized by high-speed operation, large capacity, and nonvolatility. A magnetoresistance effect is a phenomenon that occurs when a magnetic field is applied to a ferromagnetic material, electric resistance changes in accordance with the direction of magnetization of the ferromagnetic material. It is possible to operate a ferromagnetic material as a memory device by using the direction of magnetization of the ferromagnetic material to record data, and reading the data based on the magnitude of corresponding electric resistance. Recently, an MRAM using a tunneling magnetoresistance effect (hereinafter also referred to as TMR) in a magnetic tunnel junction, which has a sandwich structure in which an insulating layer (tunnel barrier layer) is inserted between two ferromagnetic layers (hereinafter also referred to as MTJ), has been attracting attention after it was found that more than 20% of magnetoresistive variation rate (MR ratio) can be obtained by the tunneling magnetoresistance effect (TMR effect).
When a TMR element is used as a magnetic element of a memory cell of an MRAM, a magnetization pinned layer, in which the direction of magnetization is pinned, and which serves as a magnetization reference layer, is used as one of two ferromagnetic layers sandwiching a tunnel barrier layer, and a magnetization free layer, in which the direction of magnetization can be reversed, and which serves as a magnetization recording layer, is used as the other. In order to fix the direction of magnetization of the magnetization pinned layer, an antiferromagnetic layer is provided so as to contact the ferromagnetic layer, thereby preventing magnetization reversal by the use of exchange coupling force. It is possible to store information by assigning binary data items “0” and “1” to the state where the magnetization directions of the magnetization pinned layer and the recording layer are in parallel with each other, and the state where they are antiparallel with each other.
The writing of information to be recorded is performed by reversing the direction of magnetization of the recording layer with an induced magnetic field generated by passing a current through a write wiring line provided in the vicinity of the TMR element. In general, the direction of a bit line current for “0”-write operation is opposite to that for “1”-write operation. It is preferable that the magnetic field required for the magnetization reversal of the recording layer, i.e., the switching magnetic field, be as small as possible within the range where the thermal stability can be ensured. In order to decrease write errors, it is preferable that the bit-per-bit fluctuation in the switching magnetic field be as small as possible. The reading of recorded information is performed by detecting the change in resistance caused by the TMR effect. Thus, in a TMR element used to form an MRAM, it is preferable that the MR ratio due to the TMR effect be as large as possible. In order to read the information accurately, it is preferable that the resistance fluctuations be as small as possible.
When the magnetization direction of a recording layer is in parallel with that of a pinned layer, the resistance of the TMR element is low. This state is defined as, e.g., “0”. When the magnetization direction of a recording layer is antiparallel with that of a pinned layer, the resistance of the TMR element is high. This state is defined as, e.g., “1”. Whether the recording layer is in the “0” state or the “1” state is read by determining whether the recording layer is in a low resistance state or high resistance state by passing a current though the TMR element.
Next, conventional read methods will be described. First, a method called “external reference method” will be described below. In this method, whether the recording layer is in the “0” state or “1” state is determined by providing a reference resistance having a resistance value which is between that of the “0” state and that of the “1” state, and detecting whether the resistance value of the memory cell to be read is smaller or larger than the resistance value of the reference resistance. In this case, it is necessary that the difference between the resistance value of the reference resistance and the resistance value in the “0” state and the difference between the resistance value of the reference resistance and the resistance value in the “1” state be considerably larger than the fluctuations in resistance value of the TMR element forming the memory cell of an MRAM. That is to say, in order to decrease read errors, it is preferable that the MR ratio of the TMR element be as large as possible, and the fluctuations in resistance value of the TMR element be as small as possible.
In order to be a general-purpose memory with a low bit cost, an MRAM should be of a large capacity and high density. However, when the number of entire bits in a chip increases, the number of bits in which the resistance value is far away from the mean value increases. Thus, in a case where an MRAM has a large capacity and high density, the MR ratio of the TMR element thereof is small, and the resistance fluctuation of the TMR element is great, the number of read errors increases since the difference between the mean value of the resistance distribution in the “0” state and the mean value of the resistance distribution in the “1” state becomes smaller, and the tail of the resistance distribution in the “0” or “1” state overlaps the resistance value of the reference resistance. That is to say, the probability become higher where a memory cell storing a data item “1” is read as storing a data item “0” because the resistance value thereof is lower than the reference resistance value. In such a case, an external reference read method using the external reference resistance value cannot be utilized.
In order to deal with such a case, a read method called “self-reference method” is proposed (for example, U.S. Pat. No. 6,134,138). In this self-reference method, an original data recorded in a bit noticed is determined by measuring the change in resistance value caused by a write operation on the bit. Since the difference in resistance value at the time of comparison is the difference ΔR between the resistance value in the “0” state, and the resistance value in the “1” state, it is possible to produce a signal having a signal value twice as large as that of an external reference method. That is to say, this method is twice as resistant to the fluctuation in resistance value. The reading process of this self-reference method will be described below.
(i). First, a first read operation is performed to read and store a resistance value (the value actually read is a current value or voltage value). In a circuit configuration, for example, the voltage thereof is stored in a first capacitance in a read circuit.
(ii). Next, a trial data item, e.g., “0”, is written.
(iii). Next, a second read operation is performed to read and store the resistance value of the trial data item. In a circuit configuration, for example, the voltage thereof is stored in a second capacitance in a read circuit.
(iv). Subsequently, the result of the first read operation is compared with the result of the second read operation and evaluated. When there is no difference, the original data item is the same as the trial data item, i.e., “0”, and when there is a difference, the original data item is opposite to the trial data item, i.e., “1”.
(v). Then, based on the evaluation result in step (iv), “1” is rewritten to only the bits originally having data items opposite to the trial data item.
This read process is described using the case where the trial data item is “0”. However, the trial data item can be “1”. This read method is effective when the same trial data item can be written to all of the bits in a single write operation.
Another MRAM writing method is known, in which a TMR element is alternately switched between binary resistance values with the same direction of write current (for example, U.S. Pat. No. 6,545,906). The TMR element constituting the MRAM disclosed in U.S. Pat. No. 6,545,906 has a synthetic antiferromagnetic (SAF) recording layer, which is composed of a plurality of ferromagnetic layers. A non-magnetic metal layer is inserted between the ferromagnetic layers. The ferromagnetic layers are coupled by antiferromagnetic coupling via the non-magnetic metal layer. In this MRAM writing method, the current flowing through a bit line for the “0”-write operation has the same sign as that for the “1”-write operation. And also the current flowing through a word line for the “0”-write operation has the same sign as that for the “1”-write operation. When write pulses are given at predetermined times, every time a write pulse is given, the sate alternately changes between “1” and “0”. Accordingly, when the initial states (“0” or “1”) of bits are unknown, such bits cannot be written to have the same data item as the trial data item, e.g., “0”, in a single write operation. When the original data item is “0”, after a write operation, the state changes to “1”, and on the contrary, when the original data item is “1”, after a write operation, the state changes to “0”. For this reason, the conventional “self-reference method” does not function and an external reference read method is utilized in U.S. Pat. No. 6,545,906.
In an MRAM including a memory cell array, the state of which is switched between binary resistance values with a single kind of write pulse, the aforementioned conventional self-reference method cannot be employed because the aforementioned step (ii) cannot be performed.
As mentioned before, in an MRAM including a memory cell array in which the state is switched between binary resistance values with a single kind of write pulse, every time a write operation is performed, the data is reversed. For this reason, conventional self-reference read methods cannot be employed and the external reference read method is generally utilized. Therefore, the occurrence of read errors cannot be reduced, and it is not possible to produce a larger read signal.